Electronic System Level Design
IEE 5046
Spring, 2007
Last Update July 3
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Overview Electronic System Level (ESL) Design enables system architects to effectively explore the design space to construct a system. The ESL Design Lab provides hand-on experience in ESL design methodology. The lab modules includes system-level algorithm development, high-level performance estimation, platform-based design, transaction-level modeling, heterogeneous design/verification, and virtual and rapid prototyping. On completion of this course, the student should be able know the ESL basics of how to build a system and what tools to be used. Prerequisites
Instructor
Lecture Hours 15:40 ~ 17:30 Wed ( 3GH ) ED414 Lab Hours 17:30 ~ 21:20 Wed ( 3IJK ) ED414 Grading
Teaching Assistants
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| 1 |
Lecture 1 Course Introduction |
PDF DOWNLOAD (Updated 2007/3/07 18:40 ) |
| 2 | SystemC | PDF DOWNLOAD |
| 3 | Lecture 2 Transaction level modeling | PDF DOWNLOAD |
| 4 | Software Skills | PDF DOWNLOAD |
| 5 | Lecture 2-2 Design automation with the TLM | PDF DOWNLOAD |
| 6 | Lecture 2-3 Timing in the TLM | PDF DOWNLOAD |
| 7 | Lecture 3 Embedded Software Development for TLM | PDF DOWNLOAD |
| 8 | Lecture 4 Analysis Challenges and Solutions | PDF DOWNLOAD |
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Pre-Labs
Labs
Term-Project
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| Related Resources |
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Course BBS Forum Please visit the board EE_ESLLab in the BBS site kulu.twbbs.org SystemC
SystemC Homepage ARM Related
ARM Architecture Reference Manual (ver. Jane 2000, E)
AMBA Specification uC/OS-II
uC/OS-II
Algorithms and Architectures "VLSI Digital Signal Processing Systems, Design and Implementation," John Wiely & Sons, 1999
Soc Design Lab 2005 This may help you better understand ARM system. Soc Design Lab 2005 homepage
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