Location: Course > 2008 ESL
Electronic System Level Based Design
課程簡介 |
|||||
| （中文）電子系統層級設計
（英文）Electronics System Level Based Design |
開課單位 | 電子碩 | |||
| 永久課號 | IEE5706 | ||||
| 授課教師： 張添烜 | |||||
| 學分數 | 3 | 必/選修 | 選修 | 開課年級 | * |
| 先修科目或先備能力：
C/C++ and RTL coding. Better to have learned about IP core design |
|||||
| 課程概述與目標：
隨著半導體製程進步至深次微米的時代，造就目前晶片具有十億邏輯閘(100- million gate)的容量。然而傳統的設計方法與工具，卻無法在滿足開發時程的前題下，快速且有效地利用如此大的晶片容量。因此為了因應這樣的問題， Electronic System Level設計便被視為最有潛力的解決方法。其內容囊括系統層級演算法的開發(System-level Algorithm Development)、高階效能預估(High-level Performance Estimation)、平台為基礎之系統設計(platform-based design)、軟硬體協同設計與驗證(HW/SW co-design/co-verification)、和C語言為基礎的合成(C-based synthesis)等等。透過這些方法與開發工具，系統設計開發將有可能用更短的開發時間，創造更好的單晶片系統。基於此，本課程將介紹ESL- based的設計方法和工具，以因應培養未來的系統設計人才的需求。 |
|||||
| 課程大綱 | ||||||
| 分配時數 | 備註 | |||||
| 單元主題 | 內容綱要 | 講授 | 示範 | 習作 | 其他 | |
| Transaction level modeling | introduce the concept, implementation and related tools of transaction level modeling | 3 |
||||
| Design analysis, problems and solutions | analysis, problem, and its solutions for ESL | 3 |
||||
| Platform introduction | review components of platform | 3 |
||||
| Embedded software in TLM | introduce software programming in TLM | 3 |
||||
| 教學要點概述： |
1.學期作業 |
2.考試狀況 |
3.評量方法 |
4.教學方法及教學相關配合事項(如助教、網站或圖書及資料庫等) |
| 師生晤談 | 排定時間 | 地點 | 連絡方式 |
| Wed 13:30 ~ 15:30 | ED406 | tschang@twins.ee.nctu.edu.tw |
| 教學進度表 | ||
週次 |
上課日期 |
課程進度、內容、主題 |
1 |
2/20 |
course overview |
2 |
2/27 |
1. Lecture: Transaction level modeling 2. Lab: Prelab-SystemC review |
3 |
3/5 |
1. Platform overview 2. Lab1-Overview of Platform design |
4 |
3/12 |
1. Embedded software in TLM 2. Lab2-Embedded programming |
5 |
3/19 |
1. Analysis, problem, and solutions 2. Lab3-Memory hierarchy and Bus protocol |
6 |
3/26 |
Lab4-Processor core |
7 |
4/02 |
Spring vacation |
8 |
4/09 |
Lab5-TLM design |
9 |
4/16 |
Midterm week |
10 |
4/23 |
Lab6-Analysis |
11 |
4/30 |
Lab7-HW/SW partition |
12 |
5/07 |
Lab8-RTOS |
13 |
5/14 |
Lab9-HW/SW co-simulation |
14 |
5/21 |
Lab10-Prototype verification |
15 |
6/11 |
Mini-seminar |
| Course Information | ||||||||||||||||||||||||||||||||
Overview Electronic System Level (ESL) Design enables system architects to effectively explore the design space to construct a system. The ESL Design Lab provides hand-on experience in ESL design methodology. The lab modules includes system-level algorithm development, high-level performance estimation, platform-based design, transaction-level modeling, heterogeneous design/verification, and virtual and rapid prototyping. On completion of this course, the student should be able know the ESL basics of how to build a system and what tools to be used.
Prerequisites
Instructor
Lecture Hours 15:40 ~ 17:30 Wed ( 3GH ) ED Lab Hours 17:30 ~ 21:20 Wed ( 3IJK ) ED Grading
Teaching Assistants
|
||||||||||||||||||||||||||||||||
| Handouts, Labs & Projects | ||
| All material will put on http://e3.nctu.edu.tw/ | ||
| Related Resources | ||
Course BBS Forum Please visit the board EE_ESLLab in the BBS site kulu.twbbs.org SystemC SystemC Homepage ARM Related ARM Architecture Reference Manual (ver. Jane 2000, E) AMBA Specification uC/OS-II uC/OS-II
Algorithms and Architectures "VLSI Digital Signal Processing Systems, Design and Implementation," John Wiely & Sons, 1999
Soc Design Lab 2005 This may help you better understand ARM system. Soc Design Lab 2005 homepage |
||